Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge

  • Hong, B. H.; 
  • Cho, N.; 
  • Lee, S. J.; 
  • Yu, Y. S.; 
  • Choi, L.; 
  • ... Song, S. -H.; 
  • 외 9명
Citations

WEB OF SCIENCE

24
Citations

SCOPUS

26

초록

We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.

키워드

Gate-all-around (GAA); interface trap charge; silicon nanowire field-effect transistor (SNWFET); subthreshold degradation; FILM SOI MOSFETS; THIN-FILM; SIMULATION; MODEL
제목
Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge
저자
Hong, B. H.; Cho, N.; Lee, S. J.; Yu, Y. S.; Choi, L.; Jung, Y. C.; Cho, K. H.; Yeo, K. H.; Kim, D. -W.; Jin, G. Y.; Oh, K. S.; Park, D.; Song, S. -H.; Rieh, J. -S.; Hwang, S. W.
DOI
10.1109/LED.2011.2159473
발행일
2011-09
유형
Article
저널명
IEEE Electron Device Letters
권
32
호
9
페이지
1179 ~ 1181