Effect of ashing conditions and optimization of nano process integration in copper/porous low-k nano-interconnects

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초록

We report the optimization of ashing conditions and the process integration of a chemical vapor deposition (CVD) ultra low-k (k =2.2) organosilicate (OSG) dielectric in a top hard mask damascene structure. The N2/H 2 ash showed the lowest resistance-capacitance (RC) product and a dual top hard mask approach for dual damascene processing was built, using 200 nm SiC/50 nm SiO2 as the hard mask. This CVD low-k material had no low-k voiding, unlike other spin-on dielectric (SOD) low-k materials. The presence of the densified layer around the trench during the ashing process could improve the precursor penetration during the CVD barrier metal deposition process. Copyright © 2012 American Scientific Publishers.

키워드

Hard mask; N2/H2 ash; Nano interconnect; Nano thin film; Voiding; Ashing process; Barrier metal deposition; Damascene structure; Dual damascene; Hard masks; Low-k materials; Nano interconnect; Nano-thin films; Nanointerconnects; Organosilicates; Process integration; Resistance capacitance; Spin-on dielectrics; Ultra low-k; Voiding; Chemical vapor deposition; Optimization; Dielectric materials; copper; metal nanoparticle; article; chemistry; conformation; crystallization; electric conductivity; macromolecule; materials testing; methodology; particle size; porosity; surface property; ultrastructure; Copper; Crystallization; Electric Conductivity; Macromolecular Substances; Materials Testing; Metal Nanoparticles; Molecular Conformation; Particle Size; Porosity; Surface Properties
제목
Effect of ashing conditions and optimization of nano process integration in copper/porous low-k nano-interconnects
저자
Pyo, S.G.; Kim, S.W.
DOI
10.1166/jnn.2012.6671
발행일
2012-11
유형
Article
저널명
Journal of Nanoscience and Nanotechnology
권
12
호
11
페이지
8401 ~ 8406