Threshold Voltage Modeling of Fully Depleted Nanoscale Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistors with Doped Channel by Considering Drain Bias

초록

The threshold voltage (V-th) was modeled in a simple closed form by considering drain bias (V-DS) for fully depleted (FD) symmetric double-gate (DG) n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with doped short channels. The V-th model using only two parameters (D-G and D-D) is based on V-th0 (V-th at low V-DS), and derived from the diffusion current of doped DG MOSFETs that was modeled using surface potential (Phi(s)). D-G and D-D are parameters for considering the gate bias (V-GS) dependence and V-DS dependence, respectively, in the diffusion current model. Our compact V-th model predicted the threshold voltage behavior by considering V-DS more accurately than the constant current (CC) method down to a channel length (L) of 30 nm. (C) 2009 The Japan Society of Applied Physics

키워드