Stair-type parallel digital predistorter for power amplifier linearisation and harmonic reduction

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초록

In this study, cognitive radio systems are examined. As it is difficult to include all the candidate frequency bands of the wide spectrum of the primary channel using the filtering approach, we propose a stair-type parallel predistortion (PD) and implement it using a commercial wideband Gallium Nitride power amplifier. Parallel predistorters centred at different integer multiples of (Formula presented.) are used for constructing the PD to effectively reduce spectral regrowth of the fundamental signal as well the harmonics at different frequencies. Experimental results demonstrate that the spectral regrowth at (Formula presented.) and harmonic at (Formula presented.) are reduced by (Formula presented.) and (Formula presented.), respectively. The obtained results establish the proposed PD with parallel predistorters as a predistortion technique for dynamic spectrum allocation systems such as cognitive cellular systems and CR networks. © 2020 Informa UK Limited, trading as Taylor & Francis Group.

키워드

Digital predistortion; harmonic reduction; linearisation; power amplifier
제목
Stair-type parallel digital predistorter for power amplifier linearisation and harmonic reduction
저자
Jeong, E.-R.; Oh, H.; Joung, J.
DOI
10.1080/21681724.2020.1809016
발행일
2020-09
유형
Article
저널명
International Journal of Electronics Letters
권
9
호
4
페이지
389 ~ 402