Hybrid-SNN: CMOS 8T SRAM based Spiking Neural Network (SNN) accelerator with Hybrid Leaky-and-Integrate Fire (LIF) Neuron for Optimized Energy efficiency and Error tolerance

초록

Spiking Neural Networks (SNNs) are emerging as a promising paradigm in artificial intelligence, effectively mimicking the dynamic behavior of biological neural systems. SNN models typically employ Deterministic Leaky Integrate-and-Fire (D-LIF) or Stochastic Leaky Integrate-and-Fire (S-LIF) neurons, each optimized for specific performance goals. D-LIF neurons maximize energy efficiency through spike sparsity, while S-LIF neurons improve error tolerance. However, existing hardware lacks the capability to support both neuron types simultaneously. In this paper, we demonstrated Hybrid-SNN: CMOS implemented SNN accelerator with Hybrid LIF (H-LIF) neuron which is capable of operating as either D-LIF neuron or S-LIF neuron in a single hardware platform, enabling flexible deployment of various Hybrid-SNN configurations. Software-level simulations show that strategically distributing D-LIF and S-LIF neurons across specific layers enables the Hybrid-SNN to leverage the strengths of both neuron types: D-LIF neurons improve energy efficiency, while S-LIF neurons enhance error tolerance. This Hybrid configuration enhances both energy efficiency and computational robustness, outperforming single-mode neuron configurations. Fabricated using CMOS 180nm process technology, the Hybrid-SNN achieves an energy consumption of 1.62 pJ/SOP, offering a 1.59× improvement over its Stochastic counterpart, and exhibits a low accuracy drop of 7.67% under a 5% random weight deviation scenario, exhibiting a 1.64× improvement over its Deterministic counterpart.

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