낮은 Subthreshold 누설전류를 갖는 CMOS 논리회로

CMOS Logic Circuits with Lower Subthreshold Leakage Current

초록

We propose a new method to reduce the subthreshold leakage current. By moving the operating point of OFF state MOSFETs through input-controlled voltage generators, logic circuits with much lower leakage current can be built with few extra components. SPICE simulation results for the new inverter show correct logic results without speed degradation compared to a conventional inverter.

키워드

CMOS; Subthreshold; Leakage Current; Logic Circuit; Inverter
제목
낮은 Subthreshold 누설전류를 갖는 CMOS 논리회로
제목 (타언어)
CMOS Logic Circuits with Lower Subthreshold Leakage Current
저자
송상헌
발행일
2004-10
저널명
전기학회논문지 C권
권
53
호
10-C
페이지
500 ~ 504