Die bonding issues on silicon carbide diodes

  • Lee, Seung-Yong; 
  • Lee, Jang-Sub; 
  • Kim, Tae-Hong; 
  • Choi, Sung-Yong; 
  • Kim, Hak-Jong; 
  • ... Lee, Sang-Kwon; 
  • 외 2명
Citations

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초록

We report on the die bonding processes and how the surface roughness and metallization schemes affect the processes of die bonding in 4H-SiC device fabrication using a soldering test and die shear test (DST) with differently prepared 4H-SiC samples. The first set of samples (FZ#1 and FZ#2) was capped with sequentially evaporated Ti and Au on an annealed Ni layer. The second set of samples (FZ#3 and FZ#4) and the third set of samples (FZ#5 and FZ#6) were prepared by 4 mu m-thick Au electroplating on an annealed Ni layer and an un-annealed Ni layer, respectively. The quality of the soldering, such as the solder coverage, void, and adhesion, was characterized by optical microscope, X-ray microprobe, and DST. We found that the samples (FZ#4 and FZ#6) deposited by Au electroplating on C-face (bottom-side) 4H-SiC provided a satisfactory result for the tests of solder coverage, void, and DST and also realized the cleaning process prior to the electroplating and soldering was the most crucial in the die packaging processes of vertical structure devices. The void fraction measured by X-ray microprobe for the samples, FZ#4 and FZ#6 was 2.2% (average for 5 samples) and 0.8% (average for 3 samples), respectively.

키워드

die bonding; die shear test (DST); solder
제목
Die bonding issues on silicon carbide diodes
저자
Lee, Seung-Yong; Lee, Jang-Sub; Kim, Tae-Hong; Choi, Sung-Yong; Kim, Hak-Jong; Bahng, Wook; Kim, Nam-Kyun; Lee, Sang-Kwon
DOI
10.4028/www.scientific.net/MSF.527-529.875
발행일
2006
유형
Proceedings Paper
저널명
Materials Science Forum
권
527-529
페이지
875 ~ 878