Investigation of various copper seed layers for copper electrodeposition applicable to ultralarge-scale integration interconnection

Citations

WEB OF SCIENCE

38
Citations

SCOPUS

38

초록

As a superior substituent for the chemical-vapor deposition and physical-vapor deposition (PVD) Cu processes in an ultralarge-scale integrated interconnection, electrodeposition on two kinds of electroless-plated Cu seed layers was investigated. Co(II) and formaldehyde were used as reducing agents for each electroless plating. Two samples of electroless-plated seed layers had relatively higher resistivity due to rough and irregular grains and weakly developed (I 11) texture, which are peculiarities of electroless plating. However, the Cu electrodeposited onto the electroless-plated seed showed reasonably good. characteristics in resistivity, impurity level, crystalline structure, and surface roughness compared to those on the conventional PVD Cu seed. For the gap filling in the damascene structure, the electroless seed layer plating using formaldehyde and the subsequent electrodeposition on a patterned wafer showed an excellent filling profile without any voids or keyholes. After 400 degreesC annealing in a N-2 atmosphere, adhesion between the Cu/barrier interfaces of electrodeposited copper on the two electroless-plated seeds was highly improved. (C) 2003 American Vacuum Society.

키워드

OPTIMIZED SURFACE PRETREATMENTS; DEPOSITION; REDUCTION; FILMS
제목
Investigation of various copper seed layers for copper electrodeposition applicable to ultralarge-scale integration interconnection
저자
Kim, JJ; Kim, Soo-Kil; Lee, CH; Kim, YS
DOI
10.1116/1.1529654
발행일
2003-01
유형
Article
저널명
Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
권
21
호
1
페이지
33 ~ 38