An FPGA implementation of MML-DFE for spatially multiplexed MIMO systems

  • Yu, Sungwook; 
  • Im, Tae Ho; 
  • Park, Chang Hwan; 
  • Kim, Jaekwon; 
  • Cho, Yong Soo
Citations

WEB OF SCIENCE

13
Citations

SCOPUS

17

초록

Although the maximum-likelihood decision-feedback equalization (ML-DFE) detection method for multi-input multi-output (MIMO) system leads to a good compromise between the performance and the, complexity, the computational complexity of the ML part in the ML-DFE is still large. This paper describes a modified maximum-likelihood (MML). algorithm, which reduces the computational complexity of the original ML algorithm significantly without degrading the performance. Then, based on the MML algorithm, we propose the MML-DFE, which has the same performance as the ML-DFE but has much lower complexity. Both the ML-DFE block and MML-DFE block for 4 x 4 MIMO system have been implemented in field-programmable gate array to verify the functional correctness and the complexity advantage.

키워드

decision-feedback equalization (DFE); maximum-likelihood (ML) detection; multi-input multi-output (MIMO); WIRELESS LANS; CODES
제목
An FPGA implementation of MML-DFE for spatially multiplexed MIMO systems
저자
Yu, Sungwook; Im, Tae Ho; Park, Chang Hwan; Kim, Jaekwon; Cho, Yong Soo
DOI
10.1109/TCSII.2008.921572
발행일
2008-07
유형
Article
저널명
IEEE Transactions on Circuits and Systems II: Express Briefs
권
55
호
7
페이지
705 ~ 709