Investigation of Electrical Performance Degradation in p-AlGaN Gate Heterostructure Field-Effect Transistors Under Various Off-Stress Conditions

Citations

WEB OF SCIENCE

1
Citations

SCOPUS

1

초록

We investigate the effects of various off-state stresses on the electrical performance degradation in p-AlGaN gate heterostructure field-effect transistors (HFETs) which are especially devised for the normally-off operation. The devices were stressed under various off-stress conditions and the transfer curves were measured immediately after stresses. When the negative bias stress was applied only to the gate electrode, the drain current (I-D) decreased and the threshold voltage (V-TH) moved to the positive direction. On the other hand, when the devices were stressed at a fixed negative gate voltage with various positive drain voltages, I-D decreased, but V-TH did not move. These degradations are believed to be the results of electron trapping during the off-state stresses, and the observed different phenomena depending on the off-stress conditions may be attributed to the difference of charge trapping locations.

키워드

p-AlGaN Gate HFETs; Off-State Stresses; Electrical Performance Degradation; Charge Trapping; RECESSED GATE
제목
Investigation of Electrical Performance Degradation in p-AlGaN Gate Heterostructure Field-Effect Transistors Under Various Off-Stress Conditions
저자
Choi, Hyo-Seung; Jeong, Hun; Lee, Jeong-Hwan; Kwon, Hyuck-In
DOI
10.1166/jno.2015.1757
발행일
2015-06
유형
Article
저널명
Journal of Nanoelectronics and Optoelectronics
권
10
호
3
페이지
397 ~ 401