A Wideband True Time Delay Circuit Using 0.25 mu m GaN HEMT Technology

초록

This paper presents a wideband 4-bit true time delay IC using a 0.25 mu m GaN HEMT (High-Electron-Mobility Transistor) process for the beam-squint-free phased array antennas. The true time delay IC is implemented with a switched path circuit topology using DPDT (Double Pole Double Throw) with no shunt transistor in the inter-stages to improve the bandwidth and SPDT (Single Pole Single Throw) switches at the input and the output ports. The delay lines are implemented with CLC pi-networks with the lumped element to ensure a compact chip size. A negative voltage generator and an SPI controller are implemented in the PCB (Printed Circuit Board) due to the lack of digital control logic in GaN technology. A maximum time delay of similar to 182 ps with a time delay resolution of 10.5 ps is achieved at DC-6 GHz. The RMS (Root Mean Square) time delay and amplitude error are <5 ps and <0.6 dB, respectively. The measured insertion loss is <6.8 dB and the input and output return losses are >10 dB at DC-6 GHz. The current consumption is nearly zero with a 3.3 V supply. The chip size including pads is 2.45 similar to 1.75 mm(2). To the authors' knowledge, this is the first demonstration of a true time delay IC using GaN HEMT technology.

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