Reduction of Voltage Drop and Ripple in Voltage Multipliers

초록

In this paper we present a novel topology for high voltage generation based on the widely used Half-Wave Cockcroft-Walton voltage multiplier. The proposed topology consists of several voltage multiplying sections fed separately at their inputs and whose output voltages are summated across the load. Using the proposed topology we can attain over m times higher voltage gain compared to the regular Half-Wave Cockcroft Walton voltage multiplier (m being the splitting level), while significantly reducing the output ripple. The theory is supported by simulations and experiments.

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