3D Integrated Process and Hybrid Bonding of High Bandwidth Memory (HBM)
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초록

This review paper systematically analyzes the recent advancements in semiconductor packaging technology, focusing on hybrid bonding technology. Hybrid bonding is a crucial technique for enhancing integration density and thermal management in high-performance semiconductor devices by directly bonding metal to an insulator. It is categorized into wafer-to-wafer (W2W), die-to-wafer (D2W), and die-to-die (D2D) methods. This paper compares the characteristics, advantages, and limitations of each method while presenting technical approaches for performance improvements. Innovations such as new dielectric materials, surface and interface modifications, and optimizing the crystallinity and crystal orientation of metals can significantly enhance the reliability and performance of hybrid bonding. These strategies boost data transfer rates between memory and processors while reducing power consumption and improving overall system performance. This latest research on maximizing hybrid bonding performance is also discussed, emphasizing its potential in the next generation of memory technologies, including high bandwidth memory. This research lays a critical foundation for further advancements in high-performance 3D integrated circuit technology. © The Author(s) under exclusive licence to The Korean Institute of Metals and Materials 2025.

키워드

Cu–Cu bonding enhancementHigh bandwidth memory (HBM)Hybrid bondingInterconnection technologyDEGREES-CTECHNOLOGIESPERFORMANCECOPPER
제목
3D Integrated Process and Hybrid Bonding of High Bandwidth Memory (HBM)
저자
Lee, Chae YeonWon, Chae HoJung, SeyeonJung, Eun SuChoi, Tae MinLee, Hwa RimYoo, JinUkYoon, SonghunPyo, Sung Gyu
DOI
10.1007/s13391-025-00557-9
발행일
2025-05
유형
Article
저널명
Electronic Materials Letters
21
3
페이지
395 ~ 419