A SAR ADC with Segment Binary Weighted Attenuation Capacitor DAC layout technique

초록

This paper presents a SAR ADC with segment binary weighted attenuation capacitor (BWA) DAC layout technique using custom routing capacitor is proposed. And there are simulation and measurement results. SAR DAC with segment BWA DAC linearity is sensitive at parasitic capacitor. There are 5 types of parasitic can be formed and they can explain in mathematical expression about MSB Top voltage. To reduce these parasitic capacitors to get good linearity, custom routing capacitors are proposed. Two of custom routing capacitors are top to top routing capacitor and top to bottom routing capacitor. They protect the MSBTOP to LSBBOT, MSBTOP to LSBTOP parasitic capacitor and reduce the LSBTOP to VSS parasitic capacitor and routing the attenuation capacitor to each MSB and LSB top plate. The proposed SAR ADC is 6.56 dB higher performance than SAR ADC without routing capacitor. © 2021 IEEE.

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