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Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications
- Yoon, Young Jun;
- Seo, Jae Hwa;
- Cho, Seongjae;
- Kwon, Hyuck-In;
- Lee, Jung-Hee;
- 외 1명
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7초록
In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length (L-ch) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current (I-off) of 1.12 x 10(-11) A/mu m. In addition, the use of the high-k spacer dielectric HfO2 improves the on-state current (I-on) with an intrinsic delay time (tau) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower Ioff at a lower supply voltage (V-DD) of 0.2 V.
키워드
- 제목
- Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications
- 저자
- Yoon, Young Jun; Seo, Jae Hwa; Cho, Seongjae; Kwon, Hyuck-In; Lee, Jung-Hee; Kang, In Man
- 발행일
- 2016-04
- 유형
- Article
- 권
- 16
- 호
- 2
- 페이지
- 172 ~ 178
- 언어
- ENG
- 출판사
- IEEK PUBLICATION CENTER
- 발행국가
- 대한민국
- 분량
- 7 페이지
- ISSN
- E 2233-4866
P 1598-1657