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Enhancement mode p-channel SnO thin-film transistors with dual-gate structures
- Choi, Yong-Jin;
- Han, Young-Joon;
- Jeong, Chan-Yong;
- Song, Sang-Hun;
- Baek, Geun Woo;
- ... Kwon, Hyuck-In;
- 외 1명
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12초록
The authors demonstrate the enhancement mode p-type SnO thin-film transistors (TFTs) using dual gate (DG) structures. The cross-linked polyvinyl alcohol dielectric with a polymethylmethacrylate buffer layer is formed as a top gate (TG) insulator of the DG SnO TFT. The fabricated DG SnO TFT exhibits better electrical performances than the bottom gate (BG) and TG SnO TFTs including higher field-effect mobility and smaller subthreshold slope. In fabricated DG TFTs, the threshold voltage (V-th) of the BG TFT is linearly modulated by the voltage applied to the TG electrode. The BG transfer curve exhibits a depletion mode operation when measured while TG is grounded, but operates in the enhancement mode with a negative V-th (= -0.9 V) when a positive bias of 10 V is applied to the TG electrode. The enhancement mode operation of p-type SnO TFTs can increase the output voltage swing range and decreases the off-stage leakage currents of the complementary logic circuits. (C) 2015 American Vacuum Society.
키워드
- 제목
- Enhancement mode p-channel SnO thin-film transistors with dual-gate structures
- 저자
- Choi, Yong-Jin; Han, Young-Joon; Jeong, Chan-Yong; Song, Sang-Hun; Baek, Geun Woo; Jin, Sung Hun; Kwon, Hyuck-In
- 발행일
- 2015-07
- 유형
- Article
- 권
- 33
- 호
- 4
- 언어
- ENG
- 출판사
- A V S AMER INST PHYSICS
- 발행국가
- 미국
- ISSN
- E 2166-2746
P 1071-1023