A Dual-Output Buck Converter with Charge Redistribution Output Stage Using an Average-Difference Regulation Scheme

초록

This paper presents a dual-output high-step-down buck converter with a resonant charge redistribution output stage using an average-difference regulation (ADR) scheme. The proposed converter combines a double-step-down (DSD) power stage and a resonant switched-capacitor charge redistribution (RCR) output stage to generate two low-voltage outputs from a 12 V input. The DSD stage regulates the intermediate voltage, which determines the sum of the two output voltages, while the RCR output stage controls the voltage difference between the two outputs through phase-shift control. Therefore, the proposed architecture separates output-voltage average regulation and output-voltage balancing, reducing cross regulation under load-imbalance conditions. The converter was designed in a 0.18 mu m BCD process with an active chip area of 8.29mm2 , including bonding pads. It supports two output voltages from 0.8 V to 1.2 V with a maximum load current of 2 A per output. Simulation results show an output voltage ripple of 7 mV at 1 V. For a 0.5 A to 2 A load step, the transient output exhibits a 147 mV undershoot, while the cross-regulation voltage is limited to 18 mV. The peak efficiency is 90.1% at a 0.5 A load current per output.

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